A commonly used device configuration in silicon integrated circuit technology is referred to as CMOS, which is an acronym for Complementary Metal Oxide Semiconductor. This configuration obtained its name because it uses both p-channel and n-channel insulated gate field effect transistors. For best operation, the n-channel and p-channel devices should be electrically isolated from each other, and are therefore frequently formed in "tubs", which are doped regions in a silicon substrate. One method of forming the tubs is shown in U.S. Pat. No. 4,554,726, co-assigned herewith. In that technique, a photoresist is patterned to expose portions of the substrate for the n-type tubs. Phosphorus and arsenic are implanted, followed by photoresist stripping and oxidation of the n-type tub surface. Boron is then implanted for the p-type tub, and the oxide stripped. A dopant drive-in heating step is then accomplished to drive the dopants deeper into the semiconductor substrate, thereby forming the n-type and p-type tubs.
A second boron implant into the p tubs is performed; subsequent lithography then defines an opening in a masking layer at the boundary between the n and p tubs. An oxidation step follows, to form the "field oxide" regions, which isolate the n tubs from the p tubs at the surface of the substrate. The second boron implant then forms the "channel stop" region under the field oxide in the p tub, which aids in isolating the n-channel devices to be formed therein. In order to retain the second boron implant near the oxide/silicon interface, the field oxide is formed during a relatively brief oxidation process that is accomplished in steam at high pressure. Further fabrication steps to form the p-channel and n-channel field effect transistors (in the n tubs and p tubs, respectively) follow the tub formation, according to techniques well known to those skilled in the art.
While adequate for many prior art applications, the process described above could be improved in several respects, especially as device geometries shrink below 1 micron. For example, an improved channel stop for the n-channel devices formed in the p tub would be desirable. Also, greater punch-through resistance for the n-channel device would also be desirable.